0.35 um 3.3V Process (UC1H)
UC1H process provides a cost effective platform for 3.3V computer and consumer applications. Optional capacitors, high resistance poly resistors and native transistors are available for mixed-signal design. Triple wells are optional for noise immunization.
UC1H process has been in volume production at Shanghai Hua Hong NEC since 2001. High density standard cell libraries, production proven eSRAM and eROM compilers are available to Shanghai Hua Hong NEC' s customers. |
|
| Process Features |
| Isolation |
Locos |
| Well Formation |
Retrograded well |
| Gate Formation |
W polyside |
| S/D Formation |
Ti salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/TiN |
| Passivation |
SiO2/SiN |
|
|
| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
3.3 |
| Tox (physical) |
A |
85 |
| Vt N/P(Constant Current VT) |
V |
0.55/-0.60 |
| Idsat N/P |
uA/um |
439/-209 |
| Ioff N/P |
pA/um |
5/-20 |
| R.O. Delay |
pS/Stage |
46 |
|
| |
|
|
| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.70/0.48 |
| Poly |
0.36/0.42 |
| Contact |
0.48/0.52 |
| Metal 1 |
0.60/0.52 |
| Via 1 |
0.56/0.60 |
| Metal 2-3 |
0.72/0.60 |
| Via 2-3 |
0.56/0.60 |
| Metal 4 |
1.00/1.00 |
|
|
|
|
| |
0.35 um 5V Process (CZ6H)
CZ6H is the perfect technology platform for applications that requires 5V Vcc such as consumer microprocessors. The low leakage transistors it offers are especially suitable for handheld devices and other power sensitive applications.
CZ6H process has been in volume production at Shanghai Hua Hong NEC since 2000. Silicon-proven standard cell libraries, I/O libraries, eSRAM and eROM macros are available to Shanghai Hua Hong NEC' s customers.
|
|
| Process Features |
| Isolation |
Locos |
| Well Formation |
Retrograded well |
| Gate Formation |
W polyside |
| S/D Formation |
Ti salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/TiN |
| Passivation |
SiO2/SiN |
|
|
| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
5 |
| Tox (physical) |
A |
155 |
| Vt N/P |
V |
0.65/-0.80 |
| Idsat N/P |
uA/um |
430/-220 |
| Ioff N/P |
pA/um |
1/-2 |
| R.O. Delay |
pS/Stage |
68 |
|
| |
|
|
| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.75/0.48 |
| Poly |
0.54/0.42 |
| Contact |
0.48/0.48 |
| Metal 1 |
0.60/0.52 |
| Via 1-3 |
0.56/0.60 |
| Metal 2-3 |
0.78/0.54 |
| Metal 4 |
1.00/1.00 |
|
|
|
|
| |
0.35 um 5V Process with Embedded EEPROM (CZ6H FTSC/CZ6S FTSC)
CZ6H FT is the embedded EEPROM solution derived from 0.35 um 5V process. It is the most accepted embedded non-volatile platform for applications such as smart cards and microprocessors in the Mainland China.
|
|
| Process Features |
| Isolation |
Locos |
| Well Formation |
Retrograded well |
| Gate Formation |
Ti silicide |
| S/D Formation |
Ti salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/TiN |
| Passivation |
SiO2/SiN |
|
|
| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
5 |
| Tox (physical) |
A |
155 |
| Vt N/P |
V |
0.65/-0.80 |
| Idsat N/P |
uA/um |
430/-220 |
| Ioff N/P |
pA/um |
1/-2 |
| R.O. Delay |
pS/Stage |
68 |
|
| |
|
|
| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.75/0.48 |
| Poly |
0.54/0.42 |
| Contact |
0.36/0.44 |
| Metal 1-2 |
0.44/0.52 |
| Via 1-3 |
0.56/0.60 |
| Metal 3 |
0.72/0.60 |
| Metal 4 |
1.00/1.00 |
|
|
|
|
| |
CZ6SFTSC
|
|
| Process Features |
| Isolation |
Locos |
| Well Formation |
Retrograded well |
| Gate Formation |
Ti silicide |
| S/D Formation |
Ti salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/TiN |
| Passivation |
SiO2/SiN |
|
|
| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
5 |
| Tox (physical) |
A |
155 |
| Vt N/P |
V |
0.65/-0.80 |
| Idsat N/P |
uA/um |
430/-220 |
| Ioff N/P |
pA/um |
1/-2 |
| R.O. Delay |
pS/Stage |
68 |
|
| |
|
|
| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.75/0.48 |
| Poly |
0.54/0.42 |
| Contact |
0.36/0.44 |
| Metal 1 |
0.44/0.52 |
| Via 1-3 |
0.40/0.56 |
| Metal 2-3 |
0.44/0.52 |
| Metal 4 |
0.44/0.52 |
|
|
|
|
| |
0.35 um 5V Process with Embedded OTP (CZ6H OTP)
CZ6H OTP process provides a cost effective platform for applications that require embedded OTP such as microprocessors and RFID. Optional capacitors, high resistance poly resistors and native transistors are available for mixed-signal designs. |
|
| Process Features |
| Isolation |
Locos |
| Well Formation |
Retrograded well |
| Gate Formation |
WSI salicide poly |
| S/D Formation |
Ti salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/TiN |
| Passivation |
SiO2/SiN |
|
|
| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
5 |
| Tox (physical) |
A |
155 |
| Vt N/P |
V |
0.65/-0.80 |
| Idsat N/P |
uA/um |
430/-220 |
| Ioff N/P |
pA/um |
NA |
| R.O. Delay |
pS/Stage |
NA |
|
| |
|
|
| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.75/0.48 |
| Poly |
0.48/0.42 |
| Contact |
0.48/0.48 |
| Metal 1 |
0.60/0.52 |
| Via 1-3 |
0.56/0.60 |
| Metal 2-3 |
0.78/0.54 |
| Metal 4 |
1.00/1.00 |
|
|
|
|
| |
