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0.18um |
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0.18 um 1.8/3.3V Process [CL180G/CM180G]
Shanghai Hua Hong NEC' s CL180G process is a foundry-compatible process for general purpose applications. CM180G process offers capacitors, high resistance poly resistors and native transistors for designs that require mixed-signal components.
CL180G process is now available to customers, with choice of libraries from multiple vendors. |
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Process Features |
| Isolation |
STI |
| Well Formation |
Retrograded well |
| Gate Formation |
Co silicide, Dual polarity poly |
| S/D Formation |
Co salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG/CMP |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/Ti/TiN |
| Passivation |
SiO2/SiN |
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| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
1.8/3.3 |
| Tox (physical) |
A |
32/70 |
| Vt N/P |
V |
0.42/-0.47 |
| Idsat N/P |
uA/um |
600/-260 |
| Ioff N/P |
pA/um |
20/-20 |
| R.O. Delay |
pS/Stage |
28 |
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| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.22/0.28 |
| Poly |
0.18/0.25 |
| Contact |
0.22/0.25 |
| Metal 1 |
0.23/0.23 |
| Via 1-4 |
0.26/0.26 |
| Metal 2-5 |
0.28/0.28 |
| Via5 |
0.36/0.35 |
| Metal 6 |
0.44/0.46 |
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0.18 um 1.8V/3.3V 6M RF Process (CA/CR18)
Shanghai Hua Hong NEC' s CA/CR18 process is an advanced 0.18 um mixed-signal analog CMOS platform that enables integration of less demanding RF circuit blocks with multi-million gate CMOS logic functions for wireless, multimedia and PC products applications. This process comes standard with 1.8 and 3.3 volt CMOS, lateral and vertical PNP, MIM capacitors, varactors, poly and N-well resistors, high-Q inductors, six layers of metal, and a thick top metal. |
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| Process Features |
| Isolation |
STI |
| Well Formation |
Retrograded well |
| Gate Formation |
Co silicide, Dual polarity poly |
| S/D Formation |
Co salicide |
| ILD |
TEOS-NSG/CMP |
| Contact |
Ti/TiN/W-Plug |
| IMD |
TEOS-NSG/CMP |
| Via |
Ti/TiN/W-Plug |
| Metal |
AlCu/Ti/TiN |
| Passivation |
SiO2/SiN |
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| Device Performance |
| Parameter |
Unit |
Value |
| Vcc |
V |
1.8/3.3 |
| Tox (physical) |
A |
30/66 |
| Vt N/P |
V |
0.52/-0.44 |
| Idsat N/P |
uA/um |
600/-255 |
| Ioff N/P |
pA/um |
50/-50 |
| R.O. Delay |
pS/Stage |
32 |
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| Key Design Rule |
| Layer |
W/S |
| Diffusion |
0.22/0.28 |
| Poly |
0.18/0.25 |
| Contact |
0.22/0.25 |
| Metal 1 |
0.23/0.23 |
| Via |
0.26/0.26(Via1-Via4)
0.36/0.35(top Via) |
| Metal 2-3 |
0.28/0.28 |
| Via4 |
0.28/0.28 |
| Metal 5 |
0.28/0.28 |
| Metal 6 |
2.5/2.0 |
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