任职资格：
· Major in computer/Electronic Engineering, bachelor or above
· Experience in ASIC Frontend design or Backend(Place&Route) design
· Familiarity with ASIC design flow and experienced in above 3 following area:.Synthesis, DFT, Floorplan, P&R,CTS, STA, DRC/LVS
· Familiarity with at least one major ASIC EDA tool (Cadence, Synopsys, Magma)
· Perl / C-shell / TCL / Skill etc. scripts skills
· Good communication and interpersonal skill. Self-motivated team player in the SOC design environment.
职位描述：
· To nurture ASIC design team with constant internal digital design flow
· To provide ASIC frontend and backend design service
· To provide design solutions of some special request such as Low power/High speed/ SI Flow etc
· To support HHNEC design reference flows.
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